1. Field of the Invention
The present invention relates to a linear voltage regulator and, more particularly, to a linear voltage regulator capable of enhancing the efficiency during a light-load mode.
2. Description of the Related Art
Voltage regulators supply a required output current at a regulated output voltage to a load. Linear voltage regulators employ a power transistor operated in the ohmic region as a passive device. The output voltage is fed back to control a variable resistance of the power transistor for obtaining the regulated output voltage from an input voltage, e.g. a battery voltage, minus a potential difference across the variable resistance. During a light-load mode, the necessary output current is reduced but the current consumption of an error amplifier remains unchanged. Therefore, the conventional linear voltage regulator has a poor efficiency during the light-load mode.
FIG. 1 is a detailed circuit diagram showing a conventional linear voltage regulator 10. As shown in FIG. 1, the conventional linear voltage regulator 10 has a power transistor 11 connected between an input voltage Vin and an output terminal A. The power transistor 11 has a gate controlled by an error signal Verr generated from an output terminal of an error amplifier 12. The error amplifier 12 has an inverting input terminal for receiving a reference voltage signal Vref, and a non-inverting input terminal for receiving a feedback voltage signal Vfb. Consequently, the error signal Verr generated by the error amplifier 12 is a representative of the difference between the feedback voltage signal Vfb and the reference voltage signal Vref. The reference voltage signal Vref is determined by a reference voltage generator and has a constant voltage level. As a representative of an output voltage Vout, the feedback voltage signal Vfb is generated by a feedback circuit 14 connected to the output terminal A. For example, the feedback circuit 14 may be implemented by a resistive voltage divider using two resistors connected in series between the output terminal A and a ground potential for providing a voltage division [R2/(R1+R2)]*Vout as the feedback voltage signal Vfb. Therefore, the linear voltage regulator 10 supplies the necessary output current Iout through the power transistor 11 to a load 15. In order to improve ripples of the regulated output voltage Vout, a capacitor Co may be installed between the output terminal A and the ground potential.
In response to the in-time current requirement by the load 15, the linear voltage regulator 10 supplies a larger or smaller output current Iout with the output voltage Vout regulated at [(R1+R2)/R2]*Vref. For achieving a sufficient current driving capability so as to supply a larger output current Iout, the power transistor 11 must have a large enough dimension. However, the large-dimension power transistor 11 causes a larger gate capacitance. For more appropriately controlling the gate of the power transistor 11, the error amplifier 12 must be designed to have a smaller output impendence, which results in a larger current consumption. Therefore, when the linear voltage regulator 11 is operated in the light-load mode, i.e. the output current Iout is tiny or close to zero, the efficiency of the linear voltage regulator 10 deteriorates due to the large current consumption caused by the error amplifier 12.
Therefore, it is desired to develop a linear voltage regulator capable of enhancing the efficiency during a light-load mode.